In the product line of the computer manufacturer Apple, the Power Macintosh G5 are models of the Power Macintosh, announced in June 2003. They were dubbed Power Macintosh G5, because they incorporated PowerPC 970 microprocessors (termed G5 by Apple), running at speeds of 1.6, 1.8, and in a dual-chip version, 2.0 GHz. The G5 can communicate through its frontside bus at up to half its internal clock speed; a 2 GHz G5 thus has a 1 GHz frontside bus, and due to the 64-bit processor the G5 has a RAM ceiling of eight gigabytes (a full four gigabytes above current theoretical limits on 32-bit processors). The G5 has a "superscalar, superpiplined" execution core that can handle up to 216 in-flight instructions. The technology behind the IBM PowerPC 970 (based on IBM's POWER4 design paired with a 128-bit, 162-instruction SIMD unit for Apple's use) and that of the Power Macintosh G5 is cutting-edge for a desktop system as of its introduction.
In June 2003, Steve Jobs, Apple Computer CEO, announced that chips running at speeds of 3.0 GHz would be available "within a year." The move that Apple is making to 64-bit hardware suggests the G5 will have a long future ahead of it.
Work has started at IBM on the Power5 processor and it has multiple improvements over the Power4 which includes IBM's version of hyper-threading and a multi-core layout. This in effect allows 4 threads to be run simultaneously. Other improvements include a dedicated single-tasking mode and better power management. Its desktop successor is rumored to be the 980, which Apple will probably call the G6. It's rumored to start at 3GHz.
Eleven-hundred Power Macintosh G5s form the processing nodes of the Virginia Tech System X computer cluster supercomputer.
Product revision history
A partial list of official firmware updates
References
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