The programmed input/output (PIO) interface was the original method used to transfer data between the CPU (through the IDE controller) and an IDE/ATA device. The PIO interface is grouped into different modes that correspond to different transfer rates. The electrical signalling among the different modes is similar - only the cycle time between transactions in reduced in order to achieve a higher transfer rate. All ATA/IDE devices support the slowest mode - Mode 0. By accessing the information registers (using Mode 0) on an IDE/ATA drive, the CPU is able to determine the maximum transfer rate for the device and configure the IDE controller for optimal performance.

The PIO modes require a great deal of CPU overhead to configure a data transaction and transfer the data. Because of this inefficiency, the DMA (and eventually UDMA) interface was created to increase performance. The simple digital logic required to implement a PIO transfer still makes this transfer method useful today (especially if high transfer rates are not required).

The modes are given below:

PIO Modes
ModeMaximum Transfer Rate (MB/s)Standard Where Spec Was Defined
Mode 03.3ATA
Mode 15.2ATA
Mode 28.3ATA
Mode 311.1ATA-2
Mode 416.7ATA-2

See also: